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34 pcs
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34 pcs | On Request | 1 | On Request | On Request | 8949 | On Request | On Request |
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The GAL16V8A15LP from Lattice Semiconductor Corporation is a high-performance Electrically Erasable CMOS (E2CMOS) Programmable Logic Device (PLD). It combines advanced CMOS processing with E2 floating gate technology to deliver exceptional speed, with a maximum propagation delay of 3.5 ns and a maximum operating frequency (Fmax) of 250 MHz. This device is designed for flexibility, featuring eight configurable Output Logic Macrocells (OLMCs) that allow it to emulate various PAL architectures.
The GAL16V8A15LP offers significant power reduction compared to bipolar devices, with typical current consumption of 75mA for low power and 45mA for quarter power configurations. It supports high-speed electrical erasure in under 100ms, enabling quick reprogramming, and boasts 100 erase/write cycles with over 20 years of data retention. The device includes active pull-ups on all pins and features preload and power-on reset for all registers, ensuring 100% functional testability.
Packaged in a DIP-20 format, the GAL16V8A15LP is suitable for applications requiring standard logic speed upgrades, DMA control, state machine control, and high-speed graphics processing. Its reprogrammable cells and unique test circuitry guarantee 100% field programmability and functionality.
| Qty | Low | High |
|---|---|---|
| 1+ | $0.50 | $0.50 |
Estimated market price range - modelled values for guidance only, not live distributor offers.
The maximum propagation delay for the GAL16V8A15LP is 3.5 ns.
The GAL16V8A15LP has a maximum operating frequency (Fmax) of 250 MHz.
The GAL16V8A15LP is available in a DIP-20 package.
The GAL16V8A15LP specifies data retention in excess of 20 years.
The GAL16V8A15LP supports high-speed electrical erasure in less than 100ms.
Yes, the GAL16V8A15LP features active pull-ups on all pins.
The typical current consumption for the GAL16V8A15LP on a low power device is 75mA.