| Distributor | Stock | Pricing | MOQ | PKG | Lead Time | Date Code | On Order Quantity | On Order Delivery | |
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61 pcs
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61 pcs | On Request | 1 | On Request | On Request | On Request | On Request | On Request |
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The Lattice GAL16V8D-15LPN is a high-performance E2CMOS SPLD designed for flexible logic designs. It offers a maximum propagation delay of 3.5 ns and an Fmax of 250 MHz, making it suitable for high-speed applications. This device operates at a 5V supply voltage and features 8 output logic macrocells, providing significant design flexibility.
With its Electrically Erasable (E2) floating gate technology, the GAL16V8D-15LPN is reprogrammable, featuring high-speed electrical erasure times of less than 100ms. It boasts 100% field programmability and functionality, with specified data retention exceeding 20 years and 100 erase/write cycles. The device also includes preload and power-on reset for all registers, ensuring 100% functional testability.
Packaged in a 20-pin PDIP, this SPLD is designed for through-hole mounting. It is listed as obsolete, with stock available from factory excess or franchised distributors. Applications include DMA control, state machine control, and high-speed graphics processing.
| Qty | Low | High |
|---|---|---|
| 1+ | $0.50 | $0.50 |
Estimated market price range - modelled values for guidance only, not live distributor offers.
The nominal operating supply voltage is 5V.
It has 8 macro cells.
The maximum clock frequency is 250 MHz.
The maximum propagation delay is 3.5 ns.
It has 16 inputs and 8 outputs.
It is available in a PDIP-20 (20-pin Dual In-line Package) with through-hole mounting.
Data retention is 20 years.