| Distributor | Stock | Pricing | MOQ | PKG | Lead Time | Date Code | On Order Quantity | On Order Delivery | |
|---|---|---|---|---|---|---|---|---|---|
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61 pcs
|
61 pcs | On Request | 1 | On Request | On Request | On Request | On Request | On Request | |
|
50 pcs
|
50 pcs | On Request | 1 | On Request | On Request | 22+ | On Request | On Request | |
|
9 pcs
|
9 pcs | On Request | 1 | On Request | On Request | On Request | On Request | On Request |
| Category | |
| Manufacturer Name | |
| AEC Qualified | |
| Automotive Grade | |
| Industrial Grade | |
| Medical Grade | |
| Military Grade | |
| Mounting Type | |
| Storage Temperature | |
| Tape & Reel | |
| Temperature Range |
The Altera MAX 7000A series EPM7064AETC100-10N is a 3.3V EEPROM-based programmable logic device (PLD) built on a second-generation Multiple Array MatriX (MAX) architecture. It delivers high performance with pin-to-pin logic delays as fast as 4.5 ns and counter frequencies up to 227.3 MHz.
This device features a MultiVoltTM I/O interface, allowing the core to operate at 3.3 V while supporting 5.0-V, 3.3-V, and 2.5-V logic levels on its I/O pins. In-system programmability (ISP) is supported via an IEEE 1149.1 JTAG interface, and it includes built-in boundary-scan test (BST) circuitry compliant with IEEE 1149.1.
The EPM7064AETC100-10N is available in a 100-TQFP package, suitable for surface mount applications. It offers features such as programmable interconnect array (PIA) continuous routing, PCI compatibility, and programmable output slew-rate control, making it a versatile component for various embedded system designs.
| Qty | Low | High |
|---|---|---|
| 1+ | $0.50 | $0.50 |
Estimated market price range - modelled values for guidance only, not live distributor offers.
The maximum logic delay is 4.5 nanoseconds.
The maximum counter frequency is 227.3 MHz.
It comes in a 100-TQFP surface-mount package.
Yes, it supports in-system programmability.
Yes, it supports IEEE 1149.1 JTAG boundary scan testing.