| Distributor | Stock | Pricing | MOQ | PKG | Lead Time | Date Code | On Order Quantity | On Order Delivery | |
|---|---|---|---|---|---|---|---|---|---|
|
23 pcs
|
23 pcs | On Request | 1 | On Request | On Request | On Request | On Request | On Request |
| Category | |
| Manufacturer Name | |
| AEC Qualified | |
| Automotive Grade | |
| Industrial Grade | |
| Medical Grade | |
| Military Grade | |
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| Storage Temperature | |
| Tape & Reel | |
| Temperature Range |
The Altera EPM7032AETC44-4 is a member of the MAX 7000A family of high-performance, 3.3-V EEPROM-based programmable logic devices (PLDs). Built on a second-generation Multiple Array MatriX (MAX) architecture, this device offers fast operation with pin-to-pin logic delays of 4.5 ns and counter frequencies up to 227.3 MHz.
Key features include 3.3-V in-system programmability (ISP) via an IEEE 1149.1 JTAG interface, built-in boundary-scan test (BST) circuitry, and support for JEDEC Jam Standard Test and Programming Language (STAPL). The MultiVoltTM I/O interface allows the device core to operate at 3.3 V while supporting I/O pins compatible with 5.0-V, 3.3-V, and 2.5-V logic levels.
This PLD is supplied in a 44-TQFP package suitable for surface mounting. It offers features like programmable interconnect array (PIA), PCI compatibility, and programmable output slew-rate control, making it suitable for various digital design applications requiring flexible logic implementation.
| Qty | Low | High |
|---|---|---|
| 1+ | $0.50 | $0.50 |
Estimated market price range - modelled values for guidance only, not live distributor offers.
The maximum logic delay is 4.5 nanoseconds.
It supports a maximum counter frequency of 227.3 MHz.
The core voltage is 3.3 V.
Yes, it supports 3.3 V in-system programmability (ISP).
The package type is 44-TQFP surface mount.
It is RoHS3 compliant, although verification status is unconfirmed.