| Distributor | Stock | Pricing | MOQ | PKG | Lead Time | Date Code | On Order Quantity | On Order Delivery | |
|---|---|---|---|---|---|---|---|---|---|
|
2,500 pcs
|
2500 pcs | On Request | 1 | On Request | On Request | On Request | On Request | On Request |
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| Tape & Reel |
The Infineon CY2304SXI-1T is a 3.3 Volt Zero Delay Buffer, part of the CY2304 family. It is engineered to distribute high-speed clocks in demanding applications such as PCs, workstations, datacom, and telecom systems. The device utilizes an on-chip phase-locked loop (PLL) to lock onto an input clock signal provided at the REF pin.
Key features include zero input-to-output propagation delay, adjustable by capacitive load on the FBK input, and multiple low-skew outputs. It operates within a frequency range of 10 MHz to 133 MHz, offering a typical peak cycle-to-cycle jitter of 90 ps at 15 pF and 66 MHz. The input-to-output skew is guaranteed to be less than 250 ps, and output-to-output skew is less than 200 ps.
The CY2304SXI-1T is housed in a space-saving 8-pin 150-mil small outline integrated circuit (SOIC) package, suitable for surface mount applications. The device supports industrial temperature ranges. In power-down mode, when no rising edges are detected on the REF input, the PLL enters a low-current state, drawing less than 25 μA with all outputs three-stated.
| Qty | Low | High |
|---|---|---|
| 1+ | $12.91 | $12.91 |
Estimated market price range - modelled values for guidance only, not live distributor offers.
The CY2304SXI-1T operates at 3.3 V.
The operating frequency range is 10 MHz to 133 MHz.
The typical peak cycle-to-cycle jitter is 90 ps at 15 pF and 66 MHz.
The input-to-output skew is guaranteed to be less than 250 ps.
The output-to-output skew is guaranteed to be less than 200 ps.
It is available in an 8-pin 150-mil small outline integrated circuit (SOIC) package.