A3P600L-1FGG484I

The Microsemi ProASIC3 family, including the A3P600L-1FGG484I, represents the third generation of Microsemi flash FPGAs. These devices provide enhanced performance, density, and features compared to previous generations. Leveraging nonvolatile flash technology, ProASIC3 FPGAs offer a secure, low-power, single-chip solution that is instant-on and reprogrammable, delivering time-to-market benefits at an ASIC-level unit cost.

Key specifications for the A3P600L-1FGG484I include up to 1 million system gates, supported by up to 144 kbits of true dual-port SRAM and up to 300 user I/Os. The devices also feature 1 kbit of on-chip, reprogrammable, nonvolatile FlashROM storage and clock conditioning circuitry based on an integrated phase-locked loop (PLL). The A3P015 and A3P030 devices are exceptions, lacking PLL or RAM support.

ProASIC3 devices are designed to enable designers to create high-density systems using existing ASIC or FPGA design flows and tools. They support the ARM Cortex-M1 processor, with ARM-enabled devices identifiable by Microsemi ordering numbers beginning with M1A3P. These specific devices do not support AES decryption.

The A3P600L-1FGG484I is typically supplied in a FGG484 package, designed for surface mounting. Its nonvolatile nature ensures data retention without power, making it suitable for various embedded applications.