| Distributor | Stock | Pricing | MOQ | PKG | Lead Time | Date Code | On Order Quantity | On Order Delivery | |
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232 pcs
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232 pcs | On Request | 1 | On Request | On Request | On Request | On Request | On Request |
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| Manufacturer Name | |
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| SVHC Present |
The Xilinx XC17S10VC is a cost-effective, one-time programmable (OTP) read-only memory solution for storing configuration bitstreams for Spartan and Spartan-XL FPGAs. This component simplifies the FPGA configuration process, especially in Master Serial mode where the FPGA generates the configuration clock. The XC17S10VC requires only one user I/O pin for interface and supports programmable reset polarity.
Key features include a low-power CMOS floating-gate process and availability in both 5V and 3.3V versions. The device is housed in a SOP-8 package, making it suitable for various board designs. Its primary application is to store configuration data for Xilinx FPGAs, ensuring proper device initialization upon power-up.
This configuration PROM is designed for ease of use and reliability in FPGA systems. Once the FPGA is configured, the PROM is disabled. In Slave Serial mode, both the PROM and the FPGA are clocked by an external signal. The XC17S10VC is an essential component for ensuring the correct and efficient configuration of compatible Xilinx FPGAs.
| Qty | Low | High |
|---|---|---|
| 1+ | $1.50 | $1.50 |
Estimated market price range - modelled values for guidance only, not live distributor offers.
The XC17S10VC is available in a SOP-8 package.
The XC17S10VC is available in 5V and 3.3V versions.
The XC17S10VC is a one-time programmable (OTP) read-only memory.
The XC17S10VC is designed to store configuration bitstreams for Spartan and Spartan-XL FPGAs.
No, the XC17S10VC features a simple interface that requires only one user I/O pin.