PUMD10,115
NXP Semiconductors
The NXP Semiconductors PUMD10,115 is a pre-biased bipolar transistor array featuring 1 NPN and 1 PNP transistor. It operates at up to 50V and 100mA.
| Distributor | Stock | Pricing | MOQ | PKG | Lead Time | Date Code | On Order Quantity | On Order Delivery | |
|---|---|---|---|---|---|---|---|---|---|
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2,500 pcs
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2500 pcs | On Request | 1 | On Request | On Request | On Request | On Request | On Request | |
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96 pcs
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96 pcs | On Request | 1 | On Request | On Request | On Request | On Request | On Request |
| Category | |
| Manufacturer Name | |
| AEC Qualified | |
| Automotive Grade | |
| Industrial Grade | |
| Medical Grade | |
| Military Grade | |
| Storage Temperature | |
| Tape & Reel |
The SN54LS273J from Texas Instruments is an octal D-type flip-flop featuring a direct clear input. This monolithic, positive-edge-triggered flip-flop uses TTL circuitry to implement D-type flip-flop logic. Information at the D inputs meeting setup time requirements is transferred to the Q outputs on the positive-going edge of the clock pulse. The device is designed for applications such as buffer/storage registers, shift registers, and pattern generators.
Key electrical characteristics include 8 channels, a maximum clock frequency of 35 MHz, and a typical power dissipation of 10 milliwatts per flip-flop. The operating temperature range is specified from 0°C to 70°C. The output type is Push-Pull, and the input type is Bipolar.
Available in SOIC (DW), PDIP (N), and SOP (NS) packages, this component is suitable for various board-level implementations. The device contains eight flip-flops with single-rail outputs and buffered clock and direct clear inputs, with individual data input to each flip-flop.
| Qty | Low | High |
|---|---|---|
| 1+ | $11.68 | $11.68 |
Estimated market price range - modelled values for guidance only, not live distributor offers.
The maximum clock frequency is 35 MHz.
The operating temperature range is 0°C to 70°C.
The SN54LS273J has 8 channels.
The typical power dissipation is 10 mW per flip-flop.
