| Distributor | Stock | Pricing | MOQ | PKG | Lead Time | Date Code | On Order Quantity | On Order Delivery | |
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19,020 pcs
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19020 pcs | On Request | 1 | On Request | On Request | On Request | On Request | On Request |
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The Nexperia PUMH17,115 is a dual NPN resistor-equipped transistor (RET) designed for simplified circuit design and reduced component count. It features built-in bias resistors, including a typical 47 kΩ input resistor (R1) and a typical 22 kΩ second resistor (R2).
This device operates with a collector-emitter voltage (VCEO) of up to 50V and can handle an output current (IO) of 100mA. The power dissipation is rated at 300mW. The transistor type is 2 NPN - Pre-Biased (Dual), making it suitable for applications requiring simplified digital logic input or low current peripheral driving.
The PUMH17,115 comes in a compact 6-TSSOP, SC-88, or SOT-363 surface-mount package. Its design simplifies circuit construction, reduces component count, and lowers pick-and-place costs in automated assembly processes.
| Qty | Low | High |
|---|---|---|
| 1+ | $0.99 | $0.99 |
Estimated market price range - modelled values for guidance only, not live distributor offers.
The collector-emitter voltage (VCEO) for the PUMH17,115 is 50V.
The PUMH17,115 transistor has a maximum output current (IO) of 100mA.
The PUMH17,115 is supplied in a 6-TSSOP, SC-88, or SOT-363 package.
The typical input bias resistor value (R1) for the PUMH17,115 is 47 kΩ.