| Distributor | Stock | Pricing | MOQ | PKG | Lead Time | Date Code | On Order Quantity | On Order Delivery | |
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28,020 pcs
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28020 pcs | On Request | 1 | On Request | On Request | On Request | On Request | On Request |
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The Nexperia PUMD3-QH is a highly integrated NPN/PNP Resistor-Equipped Double Transistor (RET) designed for digital applications in automotive and industrial segments. This component simplifies circuit design by incorporating built-in bias resistors, reducing overall component count and pick and place costs.
Key electrical specifications include a 50V collector-emitter voltage (VCEO) and a 100mA output current (IO) per transistor. The integrated bias resistors have a typical value of 10 kΩ for R1, with a typical R2/R1 ratio of 1. It operates with a DC current gain (hFE) of at least 30 at 5mA collector current and 5V collector-emitter voltage. The saturation voltage (Vce Sat) is a maximum of 100mV at 500µA base current and 10mA collector current. Transition frequencies are specified at 230MHz and 180MHz under typical conditions.
Packaged in a very small SOT363 (SC-88) surface-mounted device (SMD) plastic package, the PUMD3-QH is suitable for space-constrained applications. It is qualified according to AEC-Q101, making it recommended for use in automotive applications. The device also features a typical power dissipation of 200mW per transistor at 25°C ambient temperature, with a maximum junction temperature of 150°C.
| Qty | Low | High |
|---|---|---|
| 1+ | $0.99 | $0.99 |
Estimated market price range - modelled values for guidance only, not live distributor offers.
The maximum collector-emitter voltage (VCEO) for the PUMD3-QH is 50V.
The PUMD3-QH has a maximum output current (IO) capability of 100mA per transistor.
The PUMD3-QH features integrated bias resistors with R1 typically 10 kΩ and an R2/R1 ratio typically of 1.
The PUMD3-QH is supplied in a 6-TSSOP, SC-88, SOT-363 surface mount package.
Yes, the PUMD3-QH is qualified according to AEC-Q101 and recommended for use in automotive applications.