PUMD13,115 The Nexperia PUMD13,115 is an NPN/PNP double resistor-equipped transistor (RET) in a 6-TSSOP package. It offers a 50V collector-emitter voltage and 100mA output current capability.
Mfr Part #:

PUMD13,115

Available from 3 distributors
Mfr Name: Nexperia USA Inc.
Nexperia USA Inc.
The Nexperia PUMD13,115 is an NPN/PNP double resistor-equipped transistor (RET) in a 6-TSSOP package. It offers a 50V collector-emitter voltage and 100mA output current capability.
✓ Total Stock: 615,972 pcs
$ Price Range: $0.99

PUMD13,115 Available from 3 distributors

✓ Authorised
✓ Non-Authorised
Distributor Stock Pricing MOQ PKG Lead Time Date Code On Order Quantity On Order Delivery
Non-Authorised Inventory information
577,020 pcs
577020 pcs On Request 1 On Request On Request On Request On Request On Request
Non-Authorised Inventory information
36,000 pcs
36000 pcs On Request 1 On Request On Request On Request On Request On Request
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2,952 pcs
2952 pcs On Request 1 On Request On Request On Request On Request On Request

PUMD13,115 Specifications Quick View

Most important parameters for selection – full specs in datasheet.
Category
Manufacturer Name
Current
DC Current Gain (hFE) (Min) @ Ic, Vce
Mounting Type
Power
Resistor
Supplier Device Package
Supplier Package
Transistor Type
Vce Saturation (Max) @ Ib, Ic
Voltage

PUMD13,115 Description

Short technical summary and product information.

The Nexperia PUMD13,115 is a surface-mount transistor array featuring integrated NPN and PNP transistors with built-in bias resistors. This configuration simplifies circuit design and reduces component count.

 

Key electrical specifications include a collector-emitter voltage (VCEO) of 50V and a maximum output current (IO) of 100mA per transistor. The device incorporates bias resistors with typical values of R1 = 4.7 kΩ and R2 = 47 kΩ, facilitating digital applications and low-current peripheral driving.

 

Packaged in a compact 6-TSSOP, SC-88, or SOT-363 configuration, the PUMD13,115 is suitable for space-constrained applications. Its surface-mount design ensures compatibility with automated assembly processes. The component is AEC-Q101 qualified, indicating suitability for automotive and demanding industrial environments.

PUMD13,115 Quick Information

Product Type: Transistor Array, Pre-Biased
Canonical Name: NPN/PNP Resistor-Equipped Transistor
Subcategory: Pre-Biased

PUMD13,115 Compliance

RoHS Status: RoHS Compliant
Moisture Sensitivity Level (MSL): 1 Unlimited
REACH Status: REACH Unaffected

PUMD13,115 Estimated Pricing

Qty Low High
1+ $0.99 $0.99

Estimated market price range - modelled values for guidance only, not live distributor offers.

PUMD13,115 Features

  • NPN/PNP double resistor-equipped transistor.
  • Integrated bias resistors simplify design.
  • 50V collector-emitter voltage capability.
  • 100mA maximum output current.
  • AEC-Q101 qualified for reliability.

PUMD13,115 Applications

  • Ideal for digital input control.
  • Suitable for low-current drivers.
  • Reduces component count in circuits.
  • Simplifies pick and place costs.

PUMD13,115 FAQs

6 frequently asked questions generated from this part’s specifications.
What is the collector-emitter voltage for the PUMD13,115?

The collector-emitter voltage (VCEO) for the PUMD13,115 is 50V.

What is the output current capability of the PUMD13,115 transistor array?

The PUMD13,115 has an output current capability of 100mA.

What are the integrated bias resistor values in the PUMD13,115?

The PUMD13,115 features integrated bias resistors with typical values of R1 = 4.7 kΩ and R2 = 47 kΩ.

What package type is the PUMD13,115 available in?

The PUMD13,115 is available in a 6-TSSOP, SC-88, or SOT-363 package.

Is the PUMD13,115 RoHS compliant?

The PUMD13,115 is RoHS3 compliant.

What is the Moisture Sensitivity Level (MSL) for the PUMD13,115?

The Moisture Sensitivity Level (MSL) for the PUMD13,115 is 1.

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