| Distributor | Stock | Pricing | MOQ | PKG | Lead Time | Date Code | On Order Quantity | On Order Delivery | |
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2,677 pcs
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2677 pcs | On Request | 1 | On Request | On Request | 21+ | On Request | On Request | |
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261 pcs
|
261 pcs | On Request | 1 | On Request | On Request | On Request | On Request | On Request | |
|
43 pcs
|
43 pcs | On Request | 1 | On Request | On Request | On Request | On Request | On Request |
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The NXP Semiconductors PTN3460IBS/F1MP is an embedded DisplayPort to LVDS bridge device designed for seamless connectivity between (embedded) DisplayPort sources and LVDS display panels. This IC processes incoming DisplayPort streams, performs protocol conversion, and transmits the data in LVDS format.
Key features include support for DP v1.2a/v1.1a and eDP v1.2/v1.1 standards, with Main Link operation supporting one or two lanes at link rates of 1.62 Gbit/s or 2.7 Gbit/s. It handles single or dual bus LVDS signaling with color depths of 18 or 24 bits per pixel and a pixel clock frequency up to 112 MHz. The device supports VESA or JEIDA data packing formats and includes EDID ROM emulation for panels without EDID ROM.
Designed for industrial applications, the PTN3460IBS/F1MP operates within a wide temperature range of -40°C to +85°C. It offers flexibility through multiple configuration options, including multi-level configuration pins, DP AUX interface, and I2C-bus interface. The device can be powered by a 3.3V supply or dual supplies (3.3V/1.8V).
This IC is housed in a 56-HVQFN 7mm x 7mm package with a 0.4mm pitch, suitable for surface mount applications. It features an embedded microcontroller and on-chip NVM for firmware flexibility and provides LVDS panel power-up/down sequencing control.
| Qty | Low | High |
|---|---|---|
| 1+ | $6.39 | $6.39 |
Estimated market price range - modelled values for guidance only, not live distributor offers.
The operating temperature range is -40°C to +85°C.
The PTN3460IBS/F1MP is supplied in a 56-VFQFN Exposed Pad package.
It can be powered by either a 3.3V supply only or dual supplies (3.3V/1.8V).
It is compliant to DP v1.2a and v1.1a, eDP v1.2 and v1.1, supports one or two lanes, and operates at 1.62 Gbit/s or 2.7 Gbit/s link rates.
Yes, it emulates EDID ROM behavior and supports EDID structure v1.3, with on-chip emulation for up to seven EDID data structures.