| Distributor | Stock | Pricing | MOQ | PKG | Lead Time | Date Code | On Order Quantity | On Order Delivery | |
|---|---|---|---|---|---|---|---|---|---|
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17,020 pcs
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17020 pcs | On Request | 1 | On Request | On Request | On Request | On Request | On Request | |
|
3,600 pcs
|
3600 pcs | On Request | 1 | On Request | On Request | On Request | On Request | On Request |
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The Nexperia PEMD13,115 is a dual NPN/PNP resistor-equipped transistor (RET) designed for surface mounting in a compact SOT-666 package. This component features built-in bias resistors, simplifying circuit design and reducing component count and pick-and-place costs.
Key electrical specifications include a 50V collector-emitter voltage (VCEO) and a 100mA output current capability (IO). The device also incorporates a typical 4.7 kΩ bias resistor R1. It is suitable for applications requiring reduced component count and simplified circuit design.
This transistor array is AEC-Q101 qualified, indicating its suitability for demanding applications. The SOT-666 package is ultra-small and flat, making it ideal for space-constrained designs. Its pre-biased nature simplifies digital application integration.
| Qty | Low | High |
|---|---|---|
| 1+ | $0.99 | $0.99 |
Estimated market price range - modelled values for guidance only, not live distributor offers.
The collector-emitter voltage (VCEO) for the PEMD13,115 is 50V.
The PEMD13,115 has a maximum output current (IO) of 100mA.
The PEMD13,115 is supplied in a SOT-666 package.
The PEMD13,115 has a typical R1 bias resistor of 4.7 kΩ and a typical R2/R1 ratio of 10.
Yes, the PEMD13,115 is AEC-Q101 qualified.