| Distributor | Stock | Pricing | MOQ | PKG | Lead Time | Date Code | On Order Quantity | On Order Delivery | |
|---|---|---|---|---|---|---|---|---|---|
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128 pcs
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128 pcs | On Request | 1 | On Request | On Request | 835 | On Request | On Request |
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| Delay Time tpd(1) Max | |
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| Number of Macrocells | |
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| Operating Voltage | |
| Programmable Type | |
| Supplier Device Package | |
| Tape & Reel | |
| Voltage Supply |
The Lattice Semiconductor ispMACH 4A family, including the M4A5-64/32-55VC48, offers a flexible architecture for Complex Programmable Logic Devices (CPLDs). This specific device features 64 macrocells and 32 I/O pins, with a maximum propagation delay of 5.5 ns. It operates within a supply voltage range of 4.75V to 5.25V and is designed for in-system programmability.
The CPLD architecture consists of optimized PAL blocks interconnected by a central switch matrix, enabling efficient logic design. The M4A5-64/32-55VC48 is housed in a 48-TQFP (7x7) surface-mount package. It supports JTAG (IEEE 1149.1) for boundary scan testing and in-system programming. The device operates within a commercial temperature range of 0°C to 70°C.
Key features include SpeedLocking performance for guaranteed fixed timing and First-Time-Fit capabilities for easy system integration. The ispMACH 4A family provides densities from 32 to 512 macrocells and supports both 3.3V and 5V operations. This CPLD is suitable for applications requiring flexible logic implementation and predictable timing.
| Qty | Low | High |
|---|---|---|
| 1+ | $0.50 | $0.50 |
Estimated market price range - modelled values for guidance only, not live distributor offers.
The maximum propagation delay for the M4A5-64/32-55VC48 is 5.5 ns.
This CPLD operates within a supply voltage range of 4.75V to 5.25V.
The M4A5-64/32-55VC48 is supplied in a 48-TQFP (7x7) package.
The operating temperature range is 0°C to 70°C (TA).
This CPLD has 64 macrocells.
Yes, this device is In System Programmable.
The maximum frequency counter speed is 182 MHz.