| Distributor | Stock | Pricing | MOQ | PKG | Lead Time | Date Code | On Order Quantity | On Order Delivery | |
|---|---|---|---|---|---|---|---|---|---|
|
3,271 pcs
|
3271 pcs | On Request | 1 | On Request | On Request | 21+ | On Request | On Request | |
|
1,472 pcs
|
1472 pcs | On Request | 1 | On Request | On Request | On Request | On Request | On Request | |
|
1,021 pcs
|
1021 pcs | On Request | 1 | On Request | On Request | 1605+ | On Request | On Request | |
|
135 pcs
|
135 pcs | On Request | 1 | On Request | On Request | On Request | On Request | On Request |
| Category | |
| Manufacturer Name | |
| Memory | |
| Mounting Type | |
| Number of I | |
| Number of LABs | |
| Number of Logic Elements | |
| Operating Temperature | |
| Supplier Device Package | |
| Total RAM Bits | |
| Voltage |
The Lattice Semiconductor LFE3-70EA-8FN672C is a Field Programmable Gate Array (FPGA) from the ECP3 family. It offers a high logic density with 67,000 logic elements and 8,375 LABs, supporting complex system integration.
This FPGA provides 380 I/O pins for flexible interfacing and features substantial embedded memory resources, including 4.53 Mbits of total RAM bits and up to 303K bits of distributed RAM. It supports SERDES data rates up to 3.2 Gbps.
The device operates within a supply voltage range of 1.14V to 1.26V and has an operating temperature range of 0°C to 85°C (TJ). It is housed in a 672-FPBGA (27x27) package and is designed for surface mount installation.
Key features include up to 160 sysDSP slices for high-performance multiply and accumulate operations, and up to 10 PLLs for clock management. The programmable sysI/O buffer supports a wide range of interfaces.
The LFE3-70EA-8FN672C FPGA has 67,000 logic elements.
The LFE3-70EA-8FN672C FPGA has 380 I/O pins.
The LFE3-70EA-8FN672C FPGA has a total of 4,526,080 RAM bits.
The operating temperature range for the LFE3-70EA-8FN672C FPGA is 0°C to 85°C (TJ).
The supply voltage for the LFE3-70EA-8FN672C FPGA is between 1.14V and 1.26V.
The LFE3-70EA-8FN672C FPGA is supplied in a 672-FPBGA (27x27) package.
The maximum SERDES data rate for the Lattice ECP3 family is 3.2 Gbps.