| Distributor | Stock | Pricing | MOQ | PKG | Lead Time | Date Code | On Order Quantity | On Order Delivery | |
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240 pcs
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240 pcs | On Request | 1 | On Request | On Request | On Request | On Request | On Request |
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The Lattice Semiconductor LFE2M50SE-5FN672I is a Field Programmable Gate Array (FPGA) from the LatticeECP2/M family. This device offers a high logic density with 48,000 logic elements and 6,000 Logic Array Blocks (LABs). It provides 372 I/O pins and features a substantial 4,246,528 bits of total RAM, including both embedded block RAM (EBR) and distributed RAM.
Designed for system integration, this FPGA supports a wide range of interfaces through its programmable sysI/O buffer, including LVTTL, LVCMOS, SSTL, and HSTL standards, as well as differential signaling like LVDS and LVPECL. It incorporates embedded SERDES capabilities for data rates up to 3.125 Gbps, supporting protocols such as PCI Express and Ethernet.
The device operates at a voltage range of 1.14V to 1.26V and has an operating temperature range of -40°C to 100°C (TJ). It is supplied in a 672-FPBGA (27x27) package and is designed for surface mounting. The configuration options include 1149.1 Boundary Scan compliance and an SPI boot flash interface.
The LFE2M50SE-5FN672I FPGA has 48,000 logic elements.
The LFE2M50SE-5FN672I FPGA has 372 I/O pins.
The operating voltage range for the LFE2M50SE-5FN672I FPGA is 1.14V to 1.26V.
The LFE2M50SE-5FN672I FPGA is supplied in a 672-FPBGA (27x27) package.
The operating temperature range for the LFE2M50SE-5FN672I FPGA is -40°C to 100°C (TJ).
The LFE2M50SE-5FN672I FPGA supports embedded SERDES data rates from 250 Mbps to 3.125 Gbps.
The LFE2M50SE-5FN672I FPGA has a total of 4,246,528 RAM bits.