| Distributor | Stock | Pricing | MOQ | PKG | Lead Time | Date Code | On Order Quantity | On Order Delivery | |
|---|---|---|---|---|---|---|---|---|---|
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150 pcs
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150 pcs | On Request | 1 | On Request | On Request | On Request | On Request | On Request |
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The Lattice LFE2M50E-5FN900I is a Field Programmable Gate Array (FPGA) from the LatticeECP2/M family. It offers a high logic density with 48K LUTs and 6,000 logic array blocks (LABs), providing significant processing power for system integration.
This FPGA features 410 I/O pins and a substantial 4.25 Mb of embedded RAM, specifically 1032 Kbits of EBR SRAM and 61.36 Kbits of distributed RAM. It supports embedded SERDES with data rates up to 3.125 Gbps across up to 16 channels, enabling high-speed communication interfaces like PCI Express and Ethernet.
The device operates within a voltage range of 1.14V to 1.26V and has an operating temperature range of -40°C to 100°C (TJ). It is packaged in a 900-FPBGA (31x31) and is designed for surface mounting.
Key features include sysDSP blocks for high-performance multiply-accumulate operations, sysCLOCK Analog PLLs and DLLs for flexible clock management, and programmable sysIO buffers supporting a wide array of interfaces. The device configuration is flexible, with support for 1149.1 Boundary Scan and SPI boot flash interface.
The LFE2M50E-5FN900I FPGA has 48,000 logic elements.
The LFE2M50E-5FN900I FPGA has 410 I/O pins.
The operating voltage range for the LFE2M50E-5FN900I FPGA is 1.14V to 1.26V.
The LFE2M50E-5FN900I FPGA is supplied in a 900-FPBGA (31x31) package.
The operating temperature range for the LFE2M50E-5FN900I FPGA is -40°C to 100°C (TJ).
The LFE2M50E-5FN900I FPGA supports embedded SERDES with data rates from 250 Mbps to 3.125 Gbps, across up to 16 channels.
The LFE2M50E-5FN900I FPGA has a total of 4.25 Mb of embedded RAM, including 1032 Kbits of EBR SRAM and 61.36 Kbits of distributed RAM.