| Distributor | Stock | Pricing | MOQ | PKG | Lead Time | Date Code | On Order Quantity | On Order Delivery | |
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184 pcs
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184 pcs | On Request | 1 | On Request | On Request | On Request | On Request | On Request |
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The Lattice LFE2-6SE-6FN256I is a Field Programmable Gate Array (FPGA) belonging to the LatticeECP2/M family. This device offers a logic density of 6K LUTs and provides 190 I/O pins, making it suitable for various system integration tasks.
Key electrical specifications include a total RAM bit count of 56320 bits and an operating voltage range of 1.14V to 1.26V. The device supports a wide array of programmable I/O buffer standards, including LVTTL, LVCMOS, SSTL, HSTL, and differential standards like LVDS and LVPECL. It also features source synchronous I/O support for standards such as SPI4.2 and DDR memory.
This FPGA is housed in a 256-FPBGA (17x17 mm) package and is designed for surface mounting. It operates within a temperature range of -40°C to 100°C (TJ). The device configuration options include 1149.1 Boundary Scan compliance and an SPI boot flash interface.
Additional features include sysDSP blocks for high-performance multiply and accumulate operations, and sysCLOCK Analog PLLs and DLLs for clock management. The LatticeECP2/M family also offers embedded SERDES capabilities on specific models for high-speed serial communication.
The LFE2-6SE-6FN256I FPGA has 6000 logic elements.
The LFE2-6SE-6FN256I FPGA has 190 I/O pins.
The LFE2-6SE-6FN256I FPGA operates between 1.14V and 1.26V.
The LFE2-6SE-6FN256I FPGA is supplied in a 256-FPBGA (17x17) package.
The operating temperature range for the LFE2-6SE-6FN256I FPGA is -40°C to 100°C (TJ).
Embedded SERDES is supported on LatticeECP2M devices, with data rates from 250 Mbps to 3.125 Gbps and up to 16 channels.