| Distributor | Stock | Pricing | MOQ | PKG | Lead Time | Date Code | On Order Quantity | On Order Delivery | |
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600 pcs
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600 pcs | On Request | 1 | On Request | On Request | On Request | On Request | On Request |
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The Lattice LFE2-50SE-6FN484I is a Field Programmable Gate Array (FPGA) from the LatticeECP2/M family. It offers a high logic density with 48,000 LUTs and 6,000 LABs, supported by 396,288 bits of total RAM.
This FPGA provides 339 I/O pins and operates within a voltage range of 1.14V to 1.26V. The device is designed for a junction temperature range of -40°C to 100°C. It supports various interfaces including LVTTL, LVCMOS, SSTL, HSTL, and differential standards like LVDS and LVPECL.
The device features embedded SERDES capabilities with data rates up to 3.125 Gbps and up to 16 channels. It also includes sysDSP blocks for high-performance multiply and accumulate operations, and flexible memory resources with sysMEM Embedded Block RAM.
Packaged in a 484-FPBGA (23x23mm) format, the LFE2-50SE-6FN484I is designed for surface mounting. Its configuration options include 1149.1 Boundary Scan compliance and an SPI boot flash interface.
The LFE2-50SE-6FN484I FPGA has 48,000 logic elements.
The LFE2-50SE-6FN484I FPGA has 339 I/O pins.
The LFE2-50SE-6FN484I FPGA operates between 1.14V and 1.26V.
The LFE2-50SE-6FN484I FPGA is supplied in a 484-FPBGA (23x23mm) package.
The LFE2-50SE-6FN484I FPGA operates from -40°C to 100°C (TJ).
The LFE2-50SE-6FN484I FPGA supports embedded SERDES with data rates from 250 Mbps to 3.125 Gbps and up to 16 channels.