| Distributor | Stock | Pricing | MOQ | PKG | Lead Time | Date Code | On Order Quantity | On Order Delivery | |
|---|---|---|---|---|---|---|---|---|---|
|
600 pcs
|
600 pcs | On Request | 1 | On Request | On Request | On Request | On Request | On Request |
| Category | |
| Manufacturer Name | |
| Mounting Type | |
| Number of I | |
| Number of LABs | |
| Number of Logic Elements | |
| Operating Temperature | |
| Supplier Device Package | |
| Supplier Package | |
| Tape & Reel | |
| Total RAM Bits | |
| Voltage |
The Lattice LFE2-50SE-5FN672C is a Field Programmable Gate Array (FPGA) from the LatticeECP2/M family. It offers a logic density of 48,000 logic elements and 6,000 LABs, supported by 396,288 total RAM bits.
This FPGA provides 500 I/O pins and operates within a voltage range of 1.14V to 1.26V. It features embedded SERDES capabilities with data rates from 250 Mbps to 3.125 Gbps, supporting up to 16 channels. The device includes sysDSP blocks for high-performance multiply and accumulate operations, and flexible memory resources with embedded block RAM (EBR) and distributed RAM.
Designed for system integration, the LFE2-50SE-5FN672C supports a wide range of interfaces through its programmable sysI/O buffer, including LVTTL, LVCMOS, SSTL, HSTL, and differential standards. It also supports DDR and DDR2 memory.
The device is configured in a 672-FPBGA (27x27 mm) surface mount package. Its operating temperature range is 0°C to 85°C (TJ). The FPGA is compliant with 1149.1 Boundary Scan and features an SPI boot flash interface.
The LFE2-50SE-5FN672C FPGA has 48,000 logic elements.
The LFE2-50SE-5FN672C FPGA has a total of 396,288 RAM bits.
The LFE2-50SE-5FN672C FPGA features 500 I/O pins.
The operating voltage range for the LFE2-50SE-5FN672C FPGA is 1.14V to 1.26V.
The LFE2-50SE-5FN672C FPGA is supplied in a 672-FPBGA (27x27 mm) package.
The operating temperature range for the LFE2-50SE-5FN672C FPGA is 0°C to 85°C (TJ).
The LFE2-50SE-5FN672C FPGA supports embedded SERDES data rates from 250 Mbps to 3.125 Gbps.