| Distributor | Stock | Pricing | MOQ | PKG | Lead Time | Date Code | On Order Quantity | On Order Delivery | |
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231 pcs
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231 pcs | On Request | 1 | On Request | On Request | 1027 | On Request | On Request | |
|
70 pcs
|
70 pcs | On Request | 1 | On Request | On Request | On Request | On Request | On Request |
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The Lattice LFE2-35E-5FN672C is a Field Programmable Gate Array (FPGA) from the LatticeECP2/M family. It offers a logic density of 32,000 logic elements and supports 450 I/O pins, making it suitable for system integration.
This FPGA provides 339,968 total RAM bits and features embedded SERDES capabilities with data rates up to 3.125 Gbps across up to 16 channels. It includes sysDSP blocks for high-performance multiply and accumulate operations, and flexible memory resources with sysMEM Embedded Block RAM.
The device operates within a voltage range of 1.14V to 1.26V and has an operating temperature range of 0°C to 85°C (TJ). It supports a wide array of programmable I/O buffer standards, including LVTTL, LVCMOS, SSTL, HSTL, and differential standards like LVDS and LVPECL.
Packaged in a 672-FPBGA (27x27) format, the LFE2-35E-5FN672C is designed for surface mounting. Its flexible device configuration includes 1149.1 Boundary Scan compliance and an SPI boot flash interface.
The LFE2-35E-5FN672C FPGA has 32,000 logic elements.
The LFE2-35E-5FN672C FPGA has 450 I/O pins.
The operating voltage range for the LFE2-35E-5FN672C FPGA is 1.14V to 1.26V.
The operating temperature range is 0°C to 85°C (TJ).
The LFE2-35E-5FN672C FPGA is supplied in a 672-FPBGA (27x27) package.
Yes, the LFE2-35E-5FN672C FPGA supports embedded SERDES with data rates from 250 Mbps to 3.125 Gbps across up to 16 channels.
The LFE2-35E-5FN672C FPGA features 55Kbits to 5308Kbits of sysMEM Embedded Block RAM (EBR) and 12K to 202Kbits of distributed RAM.