| Distributor | Stock | Pricing | MOQ | PKG | Lead Time | Date Code | On Order Quantity | On Order Delivery | |
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80 pcs
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80 pcs | On Request | 1 | On Request | On Request | On Request | On Request | On Request | |
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4 pcs
|
4 pcs | On Request | 1 | On Request | On Request | 805 | On Request | On Request |
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The Lattice LFE2-20E-6QN208C is a Field Programmable Gate Array (FPGA) from the LatticeECP2/M family. It offers a logic density of 21000 LUTs (Logic Elements) and supports 131 Input/Output pins. The device is equipped with 282624 total RAM bits, comprised of 2625 LABs (Logic Array Blocks).
This FPGA operates within a voltage range of 1.14V to 1.26V, with a typical supply voltage of 1.2V. It is designed for a commercial operating temperature range of 0°C to 85°C (TJ). The device supports various interfaces including LVTTL, LVCMOS, SSTL, HSTL, and differential standards like LVDS and LVPECL.
Key features include embedded SERDES capabilities with data rates up to 3.125 Gbps, sysDSP blocks for high-performance multiply-accumulate operations, and flexible memory resources. The FPGA is configured using a 1149.1 Boundary Scan compliant interface and supports SPI boot flash. It is packaged in a 208-PQFP (28x28 mm) surface mount configuration.
The LFE2-20E-6QN208C FPGA has 21000 logic elements.
The LFE2-20E-6QN208C FPGA has 131 I/O pins.
The LFE2-20E-6QN208C FPGA has 282624 total RAM bits.
The LFE2-20E-6QN208C FPGA operates between 1.14V and 1.26V.
The LFE2-20E-6QN208C FPGA operates from 0°C to 85°C (TJ).
The LFE2-20E-6QN208C FPGA is supplied in a 208-PQFP (28x28 mm) package.
The LFE2-20E-6QN208C FPGA requires surface mount installation.