| Distributor | Stock | Pricing | MOQ | PKG | Lead Time | Date Code | On Order Quantity | On Order Delivery | |
|---|---|---|---|---|---|---|---|---|---|
|
1,541 pcs
|
1541 pcs | On Request | 1 | On Request | On Request | On Request | On Request | On Request |
| Category | |
| Manufacturer Name | |
| Mounting Type | |
| Storage Temperature | |
| Tape & Reel |
The HEF4520BP is a dual 4-bit internally synchronous binary counter. It offers flexibility with an active HIGH clock input (CP0) and an active LOW clock input (CP1), both of which can also function as clock enable inputs. The counter includes an active HIGH overriding asynchronous master reset input (MR) that resets all counter outputs to LOW, independent of the clock inputs.
Schmitt-trigger action is incorporated into the clock input circuitry, making the HEF4520BP highly tolerant to slower clock rise and fall times. This integrated circuit is suitable for various digital counting applications where reliable synchronous operation and noise immunity are required.
This component is available in a 16-lead Dual In-line Package (DIP) with a standard 0.300-inch (7.62mm) lead spacing, designed for through-hole mounting.
| Qty | Low | High |
|---|---|---|
| 1+ | $12.91 | $12.91 |
Estimated market price range - modelled values for guidance only, not live distributor offers.
The typical propagation delay for the HEF4520BP varies depending on the VDD and transition type, ranging from 40 ns to 110 ns.
The HEF4520BP is available in a 16-lead DIP (Dual In-line Package) with a 0.300-inch (7.62mm) lead spacing.
The HEF4520BP has an active HIGH overriding asynchronous master reset input (MR) that resets all counter outputs to LOW, independent of the clock inputs.
The Moisture Sensitivity Level (MSL) for the HEF4520BP is 1.