| Distributor | Stock | Pricing | MOQ | PKG | Lead Time | Date Code | On Order Quantity | On Order Delivery | |
|---|---|---|---|---|---|---|---|---|---|
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474 pcs
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474 pcs | On Request | 1 | On Request | On Request | On Request | On Request | On Request |
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The Intel EPM7256AETI144-7 is a member of the MAX 7000A family of Complex Programmable Logic Devices (CPLDs). Built on a second-generation Multiple Array MatriX (MAX) architecture, this 3.3V device offers high performance with pin-to-pin logic delays of 4.5 ns and counter frequencies up to 227.3 MHz.
This CPLD features 256 macrocells, 120 I/O pins, and 5000 gates, making it suitable for various embedded applications. It supports in-system programmability (ISP) through an IEEE 1149.1 JTAG interface and offers a MultiVolt I/O interface compatible with 5.0V, 3.3V, and 2.5V logic levels. The device operates within an extended temperature range of -40°C to 85°C.
The EPM7256AETI144-7 is supplied in a 144-TQFP (20x20) package and is designed for surface mounting. Its bus-friendly architecture includes programmable slew-rate control, and it supports hot-socketing in MAX 7000AE devices.
The operating voltage supply range is 3 V to 3.6 V.
The device is supplied in a 144-TQFP (20x20) package for surface mounting.
The operating temperature range is -40°C to 85°C (TA).
The RoHS status is RoHS3 Compliant.
The Moisture Sensitivity Level is 1 Unlimited.
The maximum pin-to-pin logic delay is 4.5 ns.
The device features 256 macrocells.