| Distributor | Stock | Pricing | MOQ | PKG | Lead Time | Date Code | On Order Quantity | On Order Delivery | |
|---|---|---|---|---|---|---|---|---|---|
|
2,003 pcs
|
2003 pcs | On Request | 1 | On Request | On Request | 24+ | On Request | On Request |
| Category | |
| Manufacturer Name | |
| Clock Rate | |
| Interface | |
| Mounting Type | |
| Non | |
| On | |
| Operating Temperature | |
| Supplier Device Package | |
| Type | |
| Voltage |
The ADSP-21065LKS-264 is a high-performance digital signal processor from Analog Devices, part of the SHARC (Super Harvard Architecture Computer) family. It supports both fixed-point (32-bit) and floating-point (32-bit and 40-bit) arithmetic, making it suitable for a wide range of signal processing tasks.
Key performance specifications include a 60 MHz clock rate, 66 MIPS, 198 MFLOPS peak, and 132 MFLOPS sustained performance. The device features 544 Kbits of on-chip SRAM, configurable as program and data memory, and supports up to 64M words of external address space. It includes a host interface and serial port for communication, along with 12 programmable I/O pins and two timers with event capture options.
The DSP is housed in a 208-lead MQFP (28x28 mm) surface mount package and operates from a 3.3 V core voltage over a 0°C to 85°C temperature range. It is designed for applications in communications, audio, automotive, instrumentation, and industrial control.
The clock rate is 60 MHz.
The operating temperature range is 0°C to 85°C.
It comes in a 208-BFQFP package, with a supplier device package of 208-MQFP (28x28 mm).
The core voltage is 3.30 V.
It has 544 Kbits of on-chip SRAM and 64 kB of on-chip RAM.
It includes a Host Interface and a Serial Port.
The database indicates RoHS3 compliance, but this is unverified and low confidence.
