| Distributor | Stock | Pricing | MOQ | PKG | Lead Time | Date Code | On Order Quantity | On Order Delivery | |
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864 pcs
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864 pcs | On Request | 1 | On Request | On Request | On Request | On Request | On Request |
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The Nexperia 74LVT08PW,112 is a high-speed, BiCMOS quad 2-input AND gate. It is fully specified for partial power-down applications using IOFF circuitry, which prevents damaging backflow current when the device is powered down.
This device features a wide supply voltage range from 2.7 V to 3.6 V and overvoltage tolerant inputs up to 5.5 V. It offers significant output drive capability of +64 mA and -32 mA, and can directly interface with TTL levels. The propagation delay is a maximum of 3.4 ns at 3.3 V with a 50 pF load.
Packaged in a 14-TSSOP (0.173", 4.40mm Width) surface-mount package, the 74LVT08PW,112 is specified for operation from -40 °C to 85 °C. It also includes ESD protection exceeding 2000 V for HBM and 1000 V for CDM, and latch-up performance exceeding 500 mA.
Key features include IOFF circuitry for partial power-down mode, power-up 3-state capability, and compliance with JEDEC standard JESD8C. This makes it suitable for various digital logic applications requiring reliable AND gate functionality.
| Qty | Low | High |
|---|---|---|
| 1+ | $0.22 | $0.22 |
Estimated market price range - modelled values for guidance only, not live distributor offers.
2.7V to 3.6V.
-40°C to 85°C.
14-TSSOP (4.40mm width).
AND Gate.
2 inputs per gate, with 4 gates total.
3.4 ns with a 50 pF load.
64 mA sink (LOW-state) and -32 mA source (HIGH-state).