| Distributor | Stock | Pricing | MOQ | PKG | Lead Time | Date Code | On Order Quantity | On Order Delivery | |
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2,734 pcs
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2734 pcs | On Request | 1 | On Request | On Request | On Request | On Request | On Request | |
|
2,734 pcs
|
2734 pcs | On Request | 1 | On Request | On Request | On Request | On Request | On Request |
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The 74LVC2G04GW,125 is a dual inverter integrated circuit manufactured by NXP Semiconductors. This device is designed for use in mixed 3.3 V and 5 V environments, featuring inputs that can be driven from either voltage level. It boasts a wide supply voltage range from 1.65 V to 5.5 V and overvoltage tolerant inputs up to 5.5 V, ensuring high noise immunity.
The inverter includes Schmitt-trigger action on all inputs, making it tolerant of slower input rise and fall times. For applications requiring partial power-down, the IOFF circuitry disables the output to prevent damaging backflow current. The device offers ±24 mA output drive at 3.0 V VCC and exhibits CMOS low power dissipation. It is also designed for direct interface with TTL levels.
This component is specified for operation across a temperature range of -40 °C to +125 °C. It provides robust ESD protection, exceeding 2000 V for HBM (class 2) and 1000 V for CDM (class C3). The 74LVC2G04GW,125 is supplied in a 6-lead TSSOP package, suitable for surface mounting.
Key features include its wide supply voltage capability, overvoltage tolerant inputs, and partial power-down mode operation. The latch-up performance exceeds 250 mA, and it complies with various JEDEC standards for voltage ranges.
| Qty | Low | High |
|---|---|---|
| 1+ | $0.30 | $0.30 |
Estimated market price range - modelled values for guidance only, not live distributor offers.
The 74LVC2G04GW,125 operates within a wide supply voltage range from 1.65 V to 5.5 V.
The output drive current is ±24 mA at VCC = 3.0 V.
The device is specified for operation from -40 °C to +125 °C.
The 74LVC2G04GW,125 is supplied in a 6-lead TSSOP package.
Yes, the IOFF circuitry provides partial power-down mode operation.