| Distributor | Stock | Pricing | MOQ | PKG | Lead Time | Date Code | On Order Quantity | On Order Delivery | |
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4,020 pcs
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4020 pcs | On Request | 1 | On Request | On Request | On Request | On Request | On Request |
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The 74LVC2G00DC,125 is a dual 2-input NAND gate from Nexperia, designed for versatile use in mixed 3.3 V and 5 V environments. Its inputs are tolerant to 5 V logic, and Schmitt-trigger action ensures tolerance to slower input rise and fall times.
Key electrical specifications include a wide supply voltage range of 1.65 V to 5.5 V and an output drive of ±24 mA at 3.0 V. The propagation delay is a maximum of 3.3 ns at 5 V and 50 pF. It features 2 circuits, each with 2 inputs, operating as NAND gates.
This device is specified for partial power-down applications using IOFF circuitry. It complies with JEDEC standards JESD8-7, JESD8-5, and JESD8-B/JESD36. ESD protection is robust, exceeding 2000 V for HBM (class 2) and 1000 V for CDM (class C3).
The 74LVC2G00DC,125 is available in an 8-VSSOP surface mount package with a body width of 2.30 mm. It operates across a wide temperature range of -40°C to +125°C.
| Qty | Low | High |
|---|---|---|
| 1+ | $0.22 | $0.22 |
Estimated market price range - modelled values for guidance only, not live distributor offers.
1.65 V to 5.5 V
8-VSSOP (VSSOP8, plastic very thin shrink small outline package, 8 leads, body width 2.3 mm)
-40°C to +125°C
3.3 ns maximum at 5V with 50 pF load
±24 mA typical at VCC = 3.0 V
HBM exceeds 2000 V, CDM exceeds 1000 V
1.7 V to 2 V