DistyParts Icon
74LVC00APW,118 The Nexperia 74LVC00APW,118 is a quad 2-input NAND gate designed for mixed voltage environments. It features overvoltage tolerant inputs and a wide supply voltage range.
Mfr Part #:

74LVC00APW,118

Available from 3 distributors
Mfr Name: Nexperia USA Inc.
Nexperia USA Inc.
The Nexperia 74LVC00APW,118 is a quad 2-input NAND gate designed for mixed voltage environments. It features overvoltage tolerant inputs and a wide supply voltage range.
✓ Total Stock: 21,368 pcs
$ Price Range: $0.22

74LVC00APW,118 Available from 3 distributors

✓ Authorised
✓ Non-Authorised
Distributor Stock Pricing MOQ PKG Lead Time Date Code On Order Quantity On Order Delivery
Optech Co.,Limited ✓
Non-Authorised Inventory information
16,020 pcs
On Request
16020 pcs On Request 1 On Request On Request On Request On Request On Request
Components Technology Group, Inc. ✓
Non-Authorised Inventory information
5,000 pcs
On Request
5000 pcs On Request 1 On Request On Request On Request On Request On Request
Bristol Electronics ✓
Non-Authorised Inventory information
348 pcs
On Request
348 pcs On Request 1 On Request On Request On Request On Request On Request
DistyParts aggregates offers from multiple distributors. Final prices, lead times and terms are subject to the distributors' discretion and may change without prior notice. DistyParts is not liable for any discrepancies.

74LVC00APW,118 Specifications Quick View

Most important parameters for selection – full specs in datasheet.
Category
Manufacturer Name
Current
Input Logic Level
Lead Spacing
Lead Style
Logic Type
Max Propagation Delay @ V, Max CL
Mounting Type
Number of Circuits
Number of Inputs
Operating Temperature
SVHC Present
Supplier Device Package
Supplier Package
Voltage
View Similar Products (0)

74LVC00APW,118 Description

Short technical summary and product information.

The 74LVC00A is a quad 2-input NAND gate from Nexperia, suitable for applications requiring logic functions in mixed 3.3 V and 5 V environments. Its inputs are tolerant to overvoltages up to 5.5 V, and it operates across a wide supply voltage range from 1.2 V to 3.6 V. The device exhibits low-power CMOS consumption and offers direct interface with TTL levels.

 

This gate features Schmitt-trigger action on all inputs, providing tolerance to slower input rise and fall times. It complies with JEDEC standards JESD8-7A, JESD8-5A, and JESD8-C/JESD36. The 74LVC00APW,118 is supplied in a 14-TSSOP package, designed for surface mounting. It operates reliably within a temperature range of -40 °C to +125 °C.

 

Key electrical characteristics include a maximum propagation delay of 4.3 ns at 3.3 V and 50 pF, and an input logic level range of 1.08 V to 2 V. ESD protection is provided, with HBM exceeding 2000 V and CDM exceeding 1000 V. The device offers 4 independent circuits, each with 2 inputs and 1 output.

74LVC00APW,118 Quick Information

Product Type: Logic Gate
Series: 74LVC
Canonical Name: 74LVC00A Quad 2-input NAND Gate
Subcategory: Logic Gates

74LVC00APW,118 Compliance

RoHS Status: RoHS Compliant
Moisture Sensitivity Level (MSL): 1 Unlimited
REACH Status: REACH Unaffected

74LVC00APW,118 Estimated Pricing

Qty Low High
1+ $0.22 $0.22

Estimated market price range - modelled values for guidance only, not live distributor offers.

74LVC00APW,118 Features

  • Quad 2-input NAND gate functionality.
  • Wide 1.2V to 3.6V supply voltage range.
  • Overvoltage tolerant inputs up to 5.5V.
  • Schmitt-trigger inputs for noise tolerance.
  • Surface mount 14-TSSOP package.

74LVC00APW,118 Applications

  • Mixed 3.3V and 5V system translation.
  • General purpose logic applications.
  • Digital signal processing circuits.
  • Embedded system interfaces.

74LVC00APW,118 FAQs

6 frequently asked questions generated from this part’s specifications.
What is the operating voltage range for the 74LVC00APW,118?

The operating voltage range is from 1.2V to 3.6V.

What is the operating temperature range for this NAND gate?

The operating temperature range is -40°C to +125°C.

What package type is the 74LVC00APW,118 supplied in?

It is supplied in a 14-TSSOP package.

What is the maximum propagation delay for the 74LVC00APW,118?

The maximum propagation delay is 4.3ns at 3.3V with a 50pF load.

Does the 74LVC00APW,118 have overvoltage tolerant inputs?

Yes, the inputs are tolerant to overvoltages up to 5.5V.

What JEDEC standards does the 74LVC00APW,118 comply with?

It complies with JESD8-7A (1.65 V to 1.95 V), JESD8-5A (2.3 V to 2.7 V), and JESD8-C/JESD36 (2.7 V to 3.6 V).

Home
Account

Categories