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38 pcs
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38 pcs | On Request | 1 | On Request | On Request | On Request | On Request | On Request |
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The 74AHC377D,112 is a high-speed Si-gate CMOS octal D-type flip-flop with data enable, manufactured by NXP Semiconductors. It is pin-compatible with Low-power Schottky TTL (LSTTL) and specified in compliance with JEDEC standard No. 7-A.
This device features eight edge-triggered, D-type flip-flops with individual D inputs and Q outputs. A common clock input (CP) loads all flip-flops simultaneously when the data enable input (E) is LOW. The state of each D input, one set-up time before the LOW-to-HIGH clock transition, is transferred to the corresponding output (Qn). The E input only needs to be stable one set-up time prior to the LOW-to-HIGH transition for predictable operation.
Key features include balanced propagation delays, Schmitt-trigger actions on all inputs, and inputs that accept voltages higher than VCC. It is ideal for addressable register applications. The input levels are CMOS for the 74AHC377 variant and TTL for the 74AHCT377 variant. ESD protection is provided, exceeding 2000 V for HBM, 200 V for MM, and 1000 V for CDM.
The 74AHC377D,112 is specified for operation over a temperature range of -40 °C to +125 °C. It is available in multiple package options, including the SO20 (plastic small outline package; 20 leads; body width 7.5 mm) and TSSOP20 (plastic thin shrink small outline package; 20 leads; body width 4.4 mm).
| Qty | Low | High |
|---|---|---|
| 1+ | $0.30 | $0.30 |
Estimated market price range - modelled values for guidance only, not live distributor offers.
The input levels for the 74AHC377 are CMOS level, and for the 74AHCT377 are TTL level.
The device is specified from -40 °C to +125 °C.
ESD protection for HBM exceeds 2000 V.
ESD protection for MM exceeds 200 V.
ESD protection for CDM exceeds 1000 V.
Available package options include SO20 (plastic small outline package; 20 leads; body width 7.5 mm) and TSSOP20 (plastic thin shrink small outline package; 20 leads; body width 4.4 mm).