| Distributor | Stock | Pricing | MOQ | PKG | Lead Time | Date Code | On Order Quantity | On Order Delivery | |
|---|---|---|---|---|---|---|---|---|---|
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476 pcs
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476 pcs | On Request | 1 | On Request | On Request | On Request | On Request | On Request | |
|
61 pcs
|
61 pcs | On Request | 1 | On Request | On Request | On Request | On Request | On Request |
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| Technology |
The Xilinx XC95216-15PQ160I is a high-performance CPLD designed for general-purpose logic integration with advanced in-system programming and test capabilities. It belongs to the XC9500 family and provides 4,800 usable gates and 216 macrocells, with a fast pin-to-pin logic delay of 10 ns.
This CPLD operates at 5V and supports up to 166 user I/O pins. It features a flexible 36V18 Function Block architecture and offers programmable power reduction modes for each macrocell. The device supports IEEE Std 1149.1 boundary-scan (JTAG) and has high-drive 24 mA outputs. It is manufactured using advanced CMOS 5V FastFLASH technology.
The XC95216-15PQ160I is available in a 160-pin PQFP package. Its design considerations include endurance of 10,000 program/erase cycles and program/erase over the full commercial voltage and temperature range. The device also includes extended pattern security features for design protection.
| Qty | Low | High |
|---|---|---|
| 1+ | $4.72 | $4.72 |
Estimated market price range - modelled values for guidance only, not live distributor offers.
The pin-to-pin logic delay for the XC95216-15PQ160I is 10 ns.
The XC95216-15PQ160I has 216 macrocells.
The XC95216-15PQ160I has 4,800 usable gates.
The XC95216-15PQ160I operates at 5V.
The XC95216-15PQ160I is available in a 160-Pin PQFP package.