| Distributor | Stock | Pricing | MOQ | PKG | Lead Time | Date Code | On Order Quantity | On Order Delivery | |
|---|---|---|---|---|---|---|---|---|---|
|
1,200 pcs
|
1200 pcs | On Request | 1 | On Request | On Request | On Request | On Request | On Request |
| Category | |
| Manufacturer Name | |
| SVHC Present |
The Xilinx XC95108-10TQ100I is a high-performance CPLD designed for general-purpose logic integration, featuring advanced in-system programming and test capabilities. It is built with eight 36V18 Function Blocks, providing a total of 2,400 usable gates and achieving propagation delays as low as 7.5 ns.
This CPLD supports up to 108 macrocells and 108 user I/O pins, with I/O capability for both 3.3V and 5V systems. It offers a maximum clock frequency of 125 MHz and features like programmable power reduction modes in each macrocell, slew rate control on individual outputs, and extended pattern security for design protection. The device also includes high-drive 24 mA outputs.
Available in a TQFP100 package, the XC95108-10TQ100I is 5V in-system programmable with an endurance of 10,000 program/erase cycles. Its flexible architecture includes an enhanced pin-locking system and extensive IEEE Std 1149.1 boundary-scan (JTAG) support, making it suitable for various embedded applications requiring reliable logic integration and programmability.
125 MHz.
7.5 ns maximum (pin-to-pin).
108 macrocells.
Minimum of 10,000 program/erase cycles.
3.3V or 5V I/O capability.
24 mA minimum.