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18 pcs
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18 pcs | On Request | 1 | On Request | On Request | N/A | On Request | On Request |
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| Technology |
The Xilinx XC95108-10PQ160C is an In-System Programmable CPLD designed for general-purpose logic integration. It provides advanced in-system programming and test capabilities.
This CPLD is comprised of eight 36V18 Function Blocks, offering 2,400 usable gates with propagation delays of 7.5 ns. It features 108 macrocells and up to 108 user I/O pins. Power dissipation can be managed by configuring macrocells to standard or low-power modes, with unused macrocells turned off to minimize consumption.
Key features include 7.5 ns pin-to-pin logic delays, a clock frequency up to 125 MHz, and 5V in-system programmability with an endurance of 10,000 program/erase cycles. The device supports IEEE Std 1149.1 boundary-scan (JTAG) and offers programmable power reduction modes. It is available in a 160-pin PQFP package.
The XC95108-10PQ160C supports 3.3V or 5V I/O capability and utilizes Advanced CMOS 5V FastFLASH technology. It also includes features like slew rate control on individual outputs and extended pattern security for design protection.
The pin-to-pin logic delay for the XC95108-10PQ160C is 7.5 ns.
The maximum clock frequency (fCNT) for the XC95108-10PQ160C is 125 MHz.
The XC95108-10PQ160C has 108 macrocells.
The XC95108-10PQ160C provides 2,400 usable gates.
The XC95108-10PQ160C is available in a PQFP160 package.
Yes, the XC95108-10PQ160C is 5V in-system programmable.
The XC95108-10PQ160C supports 3.3V or 5V I/O capability.