EP3SL200F1152I4N
Xilinx
The Intel / Altera EP3SL200F1152I4N is a Stratix III L FPGA with 200,000 logic cells and 744 I/O pins. It operates at a frequency of 450MHz.
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250,000 pcs
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250000 pcs | On Request | 1 | On Request | On Request | 14+ | On Request | On Request | |
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1,173 pcs
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1173 pcs | On Request | 1 | On Request | On Request | 14+ | On Request | On Request |
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The Xilinx XC5VLX50-1FFG324C is an FPGA from the Virtex-5 LX family, built on a 65nm copper CMOS process technology. This device features 46080 logic cells and operates with a 1V core voltage. It supports I/O operation voltages ranging from 1.2V to 3.3V.
Key features include powerful clock management tiles (CMT), 36-Kbit block RAM/FIFOs, and second-generation 25x18 DSP slices. The FPGA offers high-performance SelectIO technology and ChipSync source-synchronous interfacing. It also includes system monitoring capabilities for on-chip/off-chip thermal and power supply monitoring.
This FPGA is packaged in a 324-pin FCBGA (Flip-Chip Ball Grid Array) package, available in standard or Pb-free options. The Virtex-5 family utilizes an ASMBL column-based architecture, offering multiple platforms to address diverse design needs. Integrated endpoint blocks for PCI Express are also included, with RocketIO GTP transceivers supporting speeds from 100 Mb/s to 3.75 Gb/s on LXT and SXT platforms, and RocketIO GTX transceivers supporting 150 Mb/s to 6.5 Gb/s on TXT and FXT platforms.
The XC5VLX50-1FFG324C FPGA has 46080 logic cells.
The XC5VLX50-1FFG324C FPGA is built using 65nm technology.
The core voltage for the XC5VLX50-1FFG324C FPGA is 1V.
The XC5VLX50-1FFG324C FPGA supports I/O operation voltages from 1.2V to 3.3V.
The XC5VLX50-1FFG324C FPGA comes in a 324-pin FCBGA package.
The XC5VLX50-1FFG324C FPGA features 36-Kbit block RAM/FIFOs.
The XC5VLX50-1FFG324C FPGA supports RocketIO GTP transceivers from 100 Mb/s to 3.75 Gb/s (LXT/SXT) and RocketIO GTX transceivers from 150 Mb/s to 6.5 Gb/s (TXT/FXT).