| Distributor | Stock | Pricing | MOQ | PKG | Lead Time | Date Code | On Order Quantity | On Order Delivery | |
|---|---|---|---|---|---|---|---|---|---|
|
1,200 pcs
|
1200 pcs | On Request | 1 | On Request | On Request | 06+ | On Request | On Request | |
|
140 pcs
|
140 pcs | On Request | 1 | On Request | On Request | 13+ | On Request | On Request | |
| On Request | On Request | 1 | On Request | On Request | On Request | On Request | On Request |
| Category | |
| Manufacturer Name | |
| Architecture | |
| Lead Spacing | |
| Lead Style | |
| Mounting Type | |
| Package / Case |
The Xilinx Virtex-II family, including the XC2V3000-5FG676C, is designed for high-performance applications ranging from low-density to high-density designs. These FPGAs are built on IP cores and customized modules, delivering solutions for telecommunication, wireless, networking, video, and DSP applications.
The XC2V3000-5FG676C features a leading-edge 0.15 µm / 0.12 µm CMOS 8-layer metal process, optimized for high speed and low power consumption. The Virtex-II architecture offers a wide variety of flexible features and densities, making it a powerful alternative to mask-programmed gate arrays. This specific device is part of a family comprising 11 members, with densities ranging from 40K to 8M system gates.
This FPGA is available in a surface mount package (FG676) and is suitable for various embedded systems requiring significant programmable logic capabilities. Its design supports interfaces such as PCI, LVDS, and DDR.
The Virtex-II family comprises members ranging from 40K to 8M system gates.
The Virtex-II family utilizes a leading-edge 0.15 µm / 0.12 µm CMOS 8-layer metal process.
The XC2V3000-5FG676C FPGA is provided in a FG676 package.
The RoHS status is RoHS3 Compliant.
The Moisture Sensitivity Level (MSL) is 1 Unlimited.
The REACH status is REACH Unaffected.