| Distributor | Stock | Pricing | MOQ | PKG | Lead Time | Date Code | On Order Quantity | On Order Delivery | |
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149 pcs
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149 pcs | On Request | 1 | On Request | On Request | 05+/04+ | On Request | On Request |
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The Xilinx XC2S400E-6FT256C is an FPGA belonging to the Spartan-IIE family, designed as a second-generation ASIC replacement technology. This obsolete part offers substantial logic resources with 400,000 system gates and 10,800 logic cells, operating at a maximum frequency of 357MHz.
Key features include a 0.15 micron technology process, 1.8V operating voltage, and integrated SelectRAM hierarchical memory with distributed RAM (16 bits/LUT) and configurable 4K-bit true dual-port block RAM. It provides 19 selectable I/O standards and four Delay-Locked Loops (DLLs) for precise timing control. The fast, predictable interconnect supports iterative design processes.
Packaged in a 256-pin FTBGA, the XC2S400E-6FT256C was positioned as a cost-effective alternative to mask-programmed ASICs, offering the advantage of in-system reprogrammability for field upgrades. However, it is noted as 'NOT RECOMMENDED for NEW DESIGN' and is obsolete.
This FPGA provides abundant logic resources and a rich feature set, making it suitable for applications requiring high performance and flexibility, though its obsolete status necessitates consideration of newer alternatives for new projects.
The maximum operating frequency is 357 MHz.
The device has 400,000 system gates.
The nominal operating voltage is 1.8V.
The device is available in a 256-pin FTBGA package.
The device has 288K bits of block RAM.
The device supports 19 selectable I/O standards.
The device is built on a 0.15 µm technology node.