| Distributor | Stock | Pricing | MOQ | PKG | Lead Time | Date Code | On Order Quantity | On Order Delivery | |
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14 pcs
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14 pcs | On Request | 1 | On Request | On Request | On Request | On Request | On Request |
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| SVHC Present |
The Xilinx XC18V256SO20C is an in-system programmable configuration PROM (CPLD) designed for Xilinx FPGAs. This 3.3V device offers a memory size of 256Kbit, providing a cost-effective solution for storing and re-programming FPGA configuration bitstreams.
Key features include dual configuration modes: Serial Slow/Fast configuration up to 33 MHz and Parallel configuration up to 264 Mb/s at 33 MHz. The PROM supports IEEE Std 1149.1 boundary-scan (JTAG) and offers a simple interface to the FPGA. It is cascadable for storing longer or multiple bitstreams.
The XC18V256SO20C is available in a 20-pin SOIC package, suitable for surface mounting. It operates over a commercial temperature range of 0°C to 70°C and has an endurance of 20,000 program/erase cycles. The device features 5V tolerant I/O pins and 3.3V or 2.5V output capability.
| Qty | Low | High |
|---|---|---|
| 1+ | $1.50 | $1.50 |
Estimated market price range - modelled values for guidance only, not live distributor offers.
256Kbit (256,000 bytes).
3.3V DC, maximum 3.6V.
Up to 33 MHz for serial configuration.
SOIC-20 (surface mount).
0°C to 70°C.
20,000 cycles.
Yes, the I/O pins are 5V tolerant.