XC17128EPC

The Xilinx XC17128EPC is a one-time programmable (OTP) read-only memory designed to store configuration bitstreams for Xilinx FPGAs. This CMOS EPROM offers a simple interface to the FPGA, requiring only one user I/O pin. It is available in a compact DIP8 package.

This configuration PROM supports Master Serial and Slave Serial FPGA modes. In Master Serial mode, the FPGA generates a configuration clock to drive the PROM, and data is output on the PROM DATA pin connected to the FPGA DIN pin. In Slave Serial mode, both the PROM and FPGA are clocked by an incoming signal. Multiple devices can be cascaded using the CEO output to drive the CE input of the next device, with all PROM inputs and data outputs interconnected.

The XC17128EPC is programmed using standard Hex format files generated by Xilinx Alliance or Foundation software, transferable to most commercial PROM programmers. It features programmable reset polarity for compatibility with different FPGA solutions and guarantees 20-year data retention. This component is suitable for applications requiring reliable storage of FPGA configuration data.