| Distributor | Stock | Pricing | MOQ | PKG | Lead Time | Date Code | On Order Quantity | On Order Delivery | |
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4,700 pcs
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4700 pcs | On Request | 1 | On Request | On Request | On Request | On Request | On Request | |
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1,532 pcs
|
1532 pcs | On Request | 1 | On Request | On Request | On Request | On Request | On Request |
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| Non | |
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The Texas Instruments TMS320DM6446AZWTA is a high-performance Digital Media System-on-Chip (DMSoC) from the DaVinci family. This device integrates a 32-/64-bit C64x+ DSP core capable of 513MHz clock rates and an ARM926EJ-S processor running at 256.5MHz. It is designed for demanding multimedia and industrial networking applications.
The TMS320DM6446AZWTA features a comprehensive set of peripherals and memory architecture, including 32K Byte L1P Program RAM/Cache, 80K Byte L1D Data RAM/Cache, and 64K Byte L2 Unified Mapped RAM/Cache for the DSP core. The ARM926EJ-S core includes 16K Byte Instruction Cache, 8K Byte Data Cache, 16K Byte RAM, and 8K Byte ROM. The device supports various interfaces such as ASP, EBI/EMI, Host Interface, I²C, SPI, UART, and USB.
This DMSoC includes a Video Imaging Co-Processor (VICP) with a front-end supporting CCD and CMOS imager interfaces, BT.601/BT.656 digital YCbCr 4:2:2 input, a preview engine, histogram module, and a resize engine. It operates within a temperature range of -40°C to 105°C (TC) and is available in a 361-NFBGA (16x16) package, surface mounted.
Key specifications include multiple clock rate options for both the DSP and ARM cores, extensive C64x+ instruction set features, and support for various operating systems like INTEGRITY, Linux, and Windows Embedded CE. The device is RoHS3 compliant and has an MSL rating of 1.
| Qty | Low | High |
|---|---|---|
| 1+ | $42.50 | $42.50 |
Estimated market price range - modelled values for guidance only, not live distributor offers.
-40°C to 105°C (TC)
361-NFBGA (16x16)
513MHz for the DSP core and 256.5MHz for the ARM core.
INTEGRITY, Linux, Neutrino, PrOS, and Windows Embedded CE.
Yes, it includes a Video Imaging Co-Processor (VICP) with a front-end supporting CCD and CMOS imager interfaces.