| Distributor | Stock | Pricing | MOQ | PKG | Lead Time | Date Code | On Order Quantity | On Order Delivery | |
|---|---|---|---|---|---|---|---|---|---|
|
8,218 pcs
|
8218 pcs | On Request | 1 | On Request | On Request | On Request | On Request | On Request | |
|
2,713 pcs
|
2713 pcs | On Request | 1 | On Request | On Request | 20+ | On Request | On Request | |
|
1,000 pcs
|
1000 pcs | On Request | 1 | On Request | On Request | On Request | On Request | On Request | |
|
403 pcs
|
403 pcs | On Request | 1 | On Request | On Request | 19+ | On Request | On Request |
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| Data Interface | |
| Differential Output | |
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| Tape & Reel | |
| Voltage |
The TLV5617AIDR from Texas Instruments is a dual 10-bit voltage output digital-to-analog converter (DAC) designed for various applications. It features a flexible 3-wire serial interface compatible with TMS320, SPI, QSPI, and Microwire serial ports, programmed with a 16-bit serial string.
Key electrical specifications include a 10-bit resolution and dual channels. The device offers programmable settling times of 3 µs in fast mode and 10 µs in slow mode. It operates over a voltage range of 2.7V to 5.5V. The integral nonlinearity (INL) is typically ±0.1 LSB and a maximum of ±0.7 LSB. The output type is voltage-buffered.
This DAC is suitable for applications such as digital servo control loops, digital offset and gain adjustment, industrial process control, machine and motion control devices, and mass storage devices. The TLV5617AIDR is available in an 8-SOIC package, designed for surface mount applications, and operates within an ambient temperature range of -40°C to 85°C.
| Qty | Low | High |
|---|---|---|
| 1+ | $4.02 | $4.02 |
Estimated market price range - modelled values for guidance only, not live distributor offers.
The TLV5617AIDR has a resolution of 10 bits.
The TLV5617AIDR features 2 channels.
The settling time is 3 µs in fast mode and 10 µs in slow mode.
The TLV5617AIDR operates from 2.7V to 5.5V.
The operating temperature range is -40°C to 85°C.
The TLV5617AIDR is available in an 8-SOIC package.
The INL is typically ±0.1 LSB and a maximum of ±0.7 LSB.