| Distributor | Stock | Pricing | MOQ | PKG | Lead Time | Date Code | On Order Quantity | On Order Delivery | |
|---|---|---|---|---|---|---|---|---|---|
|
21,250 pcs
|
21250 pcs | On Request | 1 | On Request | On Request | 03+ | On Request | On Request | |
|
2,500 pcs
|
2500 pcs | On Request | 1 | On Request | On Request | On Request | On Request | On Request |
| Category | |
| Manufacturer Name | |
| Clock Sync | |
| Control Features | |
| Duty Cycle (Max) | |
| Features | |
| Frequency | |
| Function | |
| Mounting Type | |
| Number of Outputs | |
| Operating Temperature | |
| Output Configuration | |
| Output Current | |
| Output Phases | |
| Output Type | |
| SVHC Present | |
| Supplier Device Package | |
| Synchronous Rectifier | |
| Topology | |
| Voltage |
The Texas Instruments TL5001IDR is a versatile PWM controller suitable for a range of DC/DC power supply designs. It operates with an input voltage from 3.6V to 40V and can provide an output voltage between 1V and 50V. This controller supports multiple topologies including Buck, Boost, and Flyback configurations, offering flexibility for different power conversion needs.
Key electrical features include a maximum duty cycle of 100% and an oscillator frequency range of 20kHz to 500kHz. It also incorporates control features such as dead time and frequency control. The device operates within a temperature range of -40°C to 85°C.
Packaged in an 8-SOIC surface mount configuration, the TL5001IDR is designed for efficient integration into printed circuit boards. Its features make it suitable for applications requiring robust power management solutions.
| Qty | Low | High |
|---|---|---|
| 1+ | $1.33 | $1.33 |
Estimated market price range - modelled values for guidance only, not live distributor offers.
The input voltage range is 3.6V to 40V.
The output voltage can range from 1V to 50V.
The maximum duty cycle is 100%.
The operating temperature range is -40°C to 85°C.
The TL5001IDR is available in an 8-SOIC package.
The TL5001IDR supports Buck, Boost, and Flyback topologies.