| Distributor | Stock | Pricing | MOQ | PKG | Lead Time | Date Code | On Order Quantity | On Order Delivery | |
|---|---|---|---|---|---|---|---|---|---|
|
6,500 pcs
|
6500 pcs | On Request | 1 | On Request | On Request | On Request | On Request | On Request |
| Category | |
| Manufacturer Name | |
| Applications | |
| Control Interface | |
| Function | |
| Lead Spacing | |
| Mounting Type | |
| Power Consumption | |
| Supplier Device Package | |
| Supplier Package | |
| Voltage |
The TDA10025HN/C1,518 is a Dual Cable Downstream Processor (CDP) from NXP Semiconductors. It is designed to implement the physical interfaces and protocols for high-quality services in DOCSIS, EuroDOCSIS, DVB, and OpenCable Set-Top Boxes (STBs).
Key features include a 12-bit ADC for digitizing downstream signals and support for QPSK, 16 QAM, 32 QAM, 64 QAM, 128 QAM, and 256 QAM demodulation. It also incorporates ITU-T J83 Annex A, B, and C Forward Error Correction (FEC).
This processor operates with dual power supplies of 1.2V and 3.3V, offering low power consumption of less than 235 mW for dual stream operation. It is housed in a compact 48-HVQFN package suitable for surface mounting.
The TDA10025HN/C1,518 is ideal for consumer video applications requiring robust cable physical layer processing.
| Qty | Low | High |
|---|---|---|
| 1+ | $9.68 | $9.68 |
Estimated market price range - modelled values for guidance only, not live distributor offers.
It supports QPSK, 16 QAM, 32 QAM, 64 QAM, 128 QAM, and 256 QAM.
It supports ITU-T J83 Annex A, B, and C FEC.
The TDA10025HN/C1,518 has an embedded 12-bit ADC.
It operates with 1.2V and 3.3V power supplies.
The power consumption is less than 235 mW for dual stream operation.
It is supplied in a 48-HVQFN Exposed Pad package.
The TDA10025HN/C1,518 is designed for surface mounting.