TC74VHC138F

The Toshiba TC74VHC138F is an advanced high-speed CMOS 3-to-8 line decoder fabricated with silicon gate C2MOS technology. It achieves high-speed operation similar to equivalent Bipolar Schottky TTL while maintaining low power dissipation.

When the device is enabled, 3 binary select inputs (A, B, and C) determine which one of the outputs (0Y-7Y) will go low. The decoding function is inhibited and all outputs go high when the enable input G1 is held low or either 2AG or 2BG is held high. G1, 2AG, and 2BG inputs are provided to ease cascade connection and for use as an address decoder for memory systems.

This decoder operates over a wide voltage range of 2V to 5.5V. An input protection circuit ensures that 0 to 5.5V can be applied to the input pins without regard to the supply voltage, preventing device destruction due to mismatched supply and input voltages. It can be used to interface 5V to 3V systems and two-supply systems such as battery backup.

Key features include high speed with a typical propagation delay of 5.7 ns at 5V, low power dissipation with a maximum ICC of 4 μA at 25°C, and high noise immunity. The TC74VHC138F is pin and function compatible with the 74ALS138. It is available in various packages including SOP, SOL, TSSOP, and VSSOP, with weights ranging from 0.02g to 0.18g.