| Distributor | Stock | Pricing | MOQ | PKG | Lead Time | Date Code | On Order Quantity | On Order Delivery | |
|---|---|---|---|---|---|---|---|---|---|
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163 pcs
|
163 pcs | On Request | 1 | On Request | On Request | 9507 | On Request | On Request | |
|
14 pcs
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14 pcs | On Request | 1 | On Request | On Request | On Request | On Request | On Request | |
|
6 pcs
|
6 pcs | On Request | 1 | On Request | On Request | On Request | On Request | On Request | |
| On Request | On Request | 1 | On Request | On Request | On Request | On Request | On Request |
| Category | |
| Manufacturer Name |
The SNJ54LS280J from Texas Instruments is a monolithic, nine-bit parity generator/checker designed with Schottky-clamped TTL circuitry. It features dedicated odd and even parity outputs, facilitating operation in either parity application.
This device offers a typical data-to-output delay of 33 ns and a typical power dissipation of 80 mW. The word-length capability can be easily expanded by cascading, making it suitable for upgrading existing systems that use MSI parity circuits. The SNJ54LS280J can be substituted for the '180 parity generator/checker in existing designs.
Packaged in a 14-pin CDIP (J) package, the SNJ54LS280J is designed for through-hole mounting. It operates within an extended temperature range of -55 to 125°C.
| Qty | Low | High |
|---|---|---|
| 1+ | $14.90 | $14.90 |
Estimated market price range - modelled values for guidance only, not live distributor offers.
The operating temperature range is -55 to 125 °C.
The typical data-to-output delay is 33 ns.
The typical power dissipation is 80 mW.
The SNJ54LS280J is available in a 14-pin CDIP (J) package.
The MSL rating is 1 Unlimited.