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SN74LVC74APW The SN74LVC74APW from Texas Instruments is a dual D-type flip-flop with positive edge triggering. It operates from 1.65V to 3.6V and offers a maximum clock frequency of 150 MHz.
Mfr Part #:

SN74LVC74APW

Available from 3 distributors
Mfr Name: Texas Instruments
Texas Instruments
The SN74LVC74APW from Texas Instruments is a dual D-type flip-flop with positive edge triggering. It operates from 1.65V to 3.6V and offers a maximum clock frequency of 150 MHz.
✓ Total Stock: 1,390 pcs
$ Price Range: $0.37

SN74LVC74APW Available from 3 distributors

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✓ Non-Authorised
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Xingangxin ✓
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1,340 pcs
On Request
1340 pcs On Request 1 On Request On Request On Request On Request On Request
MW.FEP S.p.A. ✓
Non-Authorised Inventory information
34 pcs
On Request
34 pcs On Request 1 On Request On Request On Request On Request On Request
Hybrid Electronics ✓
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16 pcs
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16 pcs On Request 1 On Request On Request NO DC On Request On Request
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SN74LVC74APW Specifications Quick View

Most important parameters for selection – full specs in datasheet.
Category
Manufacturer Name
Clock Frequency
Current
Function
Input Capacitance
Max Propagation Delay @ V, Max CL
Mounting Type
Number of Bits per Element
Number of Elements
Operating Temperature
Output Type
SVHC Present
Supplier Device Package
Supplier Package
Trigger Type
Type
Voltage
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SN74LVC74APW Description

Short technical summary and product information.

The SN74LVC74APW is a dual D-type flip-flop integrated circuit from Texas Instruments. Designed for digital logic applications, it features positive edge triggering and includes Set (Preset) and Reset functions for each flip-flop.

 

This component operates within a voltage range of 1.65V to 3.6V, making it suitable for various low-voltage systems. It boasts a high clock frequency capability of up to 150 MHz and a maximum propagation delay of 5.2ns at 3.3V with a 50pF load. The output type is complementary, and it has an input capacitance of 5 pF. The device consumes a low supply current of 10 µA.

 

Packaged in a 14-TSSOP, the SN74LVC74APW is designed for surface mounting. Its operating temperature range is from -40°C to 125°C (TA). This flip-flop is a reliable choice for applications requiring precise state storage and high-speed switching.

 

Key specifications include its dual-channel configuration, D-type functionality, and positive edge-triggered clock input. The device is RoHS3 compliant and has an MSL rating of 1.

SN74LVC74APW Quick Information

Product Type: Flip Flop
Series: SN74LVC74A
Canonical Name: Dual Positive-Edge-Triggered D-Type Flip-Flop
Subcategory: D-Type Flip-Flop

SN74LVC74APW Compliance

RoHS Status: RoHS Compliant
Moisture Sensitivity Level (MSL): 1 Unlimited
REACH Status: REACH Unaffected
Lead Free: Yes

SN74LVC74APW Estimated Pricing

Qty Low High
1+ $0.37 $0.37

Estimated market price range - modelled values for guidance only, not live distributor offers.

SN74LVC74APW Features

  • Dual D-type flip-flops with positive edge trigger.
  • Wide operating voltage from 1.65V to 3.6V.
  • High clock frequency up to 150 MHz.
  • Fast propagation delay of 5.2ns.
  • Surface mountable in a 14-TSSOP package.

SN74LVC74APW Applications

  • Ideal for state storage circuits.
  • Used in digital control systems.
  • Suitable for high-speed logic designs.
  • Component in sequential logic circuits.

SN74LVC74APW FAQs

6 frequently asked questions generated from this part’s specifications.
What is the operating voltage range of the SN74LVC74APW?

The SN74LVC74APW operates from 1.65V to 3.6V.

What is the maximum clock frequency of the SN74LVC74APW?

The maximum clock frequency is 150 MHz.

What is the package type for the SN74LVC74APW?

The SN74LVC74APW is offered in a 14-TSSOP surface-mount package.

What is the operating temperature range of the SN74LVC74APW?

The operating temperature range is -40°C to +125°C.

What is the propagation delay of the SN74LVC74APW?

The maximum propagation delay is 5.2 ns at 3.3V with a 50 pF load.

Does the SN74LVC74APW have complementary outputs?

Yes, the SN74LVC74APW provides complementary outputs (Q and Q̅).

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