| Distributor | Stock | Pricing | MOQ | PKG | Lead Time | Date Code | On Order Quantity | On Order Delivery | |
|---|---|---|---|---|---|---|---|---|---|
|
1,052 pcs
|
1052 pcs | On Request | 1 | On Request | On Request | N/A | On Request | On Request |
| Category | |
| Manufacturer Name |
The Texas Instruments SN74LVC16373DLR is a 16-bit transparent D-type latch designed for 2.7-V to 3.6-V VCC operation. This component is part of the LVC technology family and features 3-state outputs, making it suitable for various digital applications.
Key electrical specifications include a maximum clock frequency of 100 MHz, a maximum sink current (IOL) of 24 mA, and a maximum source current (IOH) of -24 mA. The device operates with a supply current of 40 µA (max) and supports a wide operating temperature range from -40°C to 85°C.
Features such as balanced outputs, over-voltage tolerant inputs, and partial power-down (Ioff) enhance its performance and usability. The latch-up performance exceeds 250 mA per JEDEC Standard JESD-17, and it includes bus hold on data inputs, eliminating the need for external pullup/pulldown resistors.
Available in TSSOP (DGG) and SSOP (DL) packages, the SN74LVC16373DLR is suitable for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers. It can also be configured as two 8-bit latches.
The SN74LVC16373DLR operates from 2.7 V to 3.6 V.
The SN74LVC16373DLR is available in a 48-pin TSSOP (DGG) package measuring 12.5 mm × 8.1 mm and a 48-pin SSOP (DL) package measuring 15.88 mm × 10.35 mm.
The operating temperature range is -40°C to 85°C.
The maximum clock frequency is 100 MHz.
The SN74LVC16373DLR has 3-state outputs.
Yes, the SN74LVC16373DLR has bus hold on data inputs, which eliminates the need for external pullup or pulldown resistors.