SN74LVC112ADR The Texas Instruments SN74LVC112ADR is a dual JK flip-flop with a clock frequency of 150 MHz. It operates from a 1.65V to 3.6V supply and comes in a 16-SOIC package.
Mfr Part #:

SN74LVC112ADR

Available from 2 distributors
Mfr Name: Texas Instruments
Texas Instruments
The Texas Instruments SN74LVC112ADR is a dual JK flip-flop with a clock frequency of 150 MHz. It operates from a 1.65V to 3.6V supply and comes in a 16-SOIC package.
✓ Total Stock: 3,024 pcs
$ Price Range: $0.22

SN74LVC112ADR Available from 2 distributors

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2,984 pcs
2984 pcs On Request 1 On Request On Request 04+ On Request On Request
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40 pcs
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SN74LVC112ADR Specifications Quick View

Most important parameters for selection – full specs in datasheet.
Category
Manufacturer Name
Clock Frequency
Current
Function
Input Capacitance
Latch-up Performance
Max Propagation Delay @ V, Max CL
Mounting Type
Number of Bits per Element
Number of Elements
Operating Temperature
Output Type
Package / Case
Supplier Device Package
Trigger Type
Type
Voltage

SN74LVC112ADR Description

Short technical summary and product information.

The SN74LVC112ADR from Texas Instruments is a dual, negative-edge-triggered J-K flip-flop designed for versatile operation within a 1.65V to 3.6V supply voltage range. This component features a high clock frequency of 150 MHz and a maximum propagation delay of 5.9ns at 3.3V and 50pF, making it suitable for high-speed digital applications.

 

Key features include Clear and Preset functions, complementary outputs, and over-voltage tolerant inputs that accept voltages up to 5.5V. The device operates within an ambient temperature range of -40°C to 85°C. It is available in a 16-SOIC package, designed for surface mounting.

 

This flip-flop is ideal for use in various digital logic circuits requiring state storage and manipulation. Its LVC technology family ensures compatibility with a wide range of logic levels. The device exhibits typical output ground bounce below 0.8V and output undershoot greater than 2V at 3.3V, with latch-up performance exceeding 250mA per JESD 17.

SN74LVC112ADR Quick Information

Product Type: JK Flip-Flop
Canonical Name: Texas Instruments SN74LVC112ADR Dual Negative-Edge-Triggered J-K Flip-Flop
Subcategory: JK Flip-Flop

SN74LVC112ADR Compliance

RoHS Status: RoHS Compliant
Moisture Sensitivity Level (MSL): 1 Unlimited
REACH Status: REACH Unaffected

SN74LVC112ADR Estimated Pricing

Qty Low High
1+ $0.22 $0.22

Estimated market price range - modelled values for guidance only, not live distributor offers.

SN74LVC112ADR Features

  • Dual negative-edge-triggered J-K flip-flop.
  • Operates from 1.65V to 3.6V supply.
  • 150 MHz maximum clock frequency.
  • Includes Clear and Preset functions.
  • 16-SOIC surface mount package.

SN74LVC112ADR Applications

  • Digital logic state storage.
  • High-speed sequential circuits.
  • Control and timing applications.
  • Interface logic designs.

SN74LVC112ADR FAQs

7 frequently asked questions generated from this part’s specifications.
What is the operating voltage range for the SN74LVC112ADR?

The SN74LVC112ADR operates from a 1.65V to 3.6V supply.

What is the maximum clock frequency of the SN74LVC112ADR?

The maximum clock frequency for the SN74LVC112ADR is 150 MHz.

What package type is the SN74LVC112ADR available in?

The SN74LVC112ADR is available in a 16-SOIC package.

What is the operating temperature range for the SN74LVC112ADR?

The operating temperature range is -40°C to 85°C.

What are the key functions of the SN74LVC112ADR flip-flop?

The SN74LVC112ADR features Set (Preset) and Reset functions.

What is the maximum propagation delay for the SN74LVC112ADR?

The maximum propagation delay is 5.9ns at 3.3V and 50pF.

Does the SN74LVC112ADR have over-voltage tolerant inputs?

Yes, the inputs accept voltages up to 5.5V.

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