| Distributor | Stock | Pricing | MOQ | PKG | Lead Time | Date Code | On Order Quantity | On Order Delivery | |
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361,600 pcs
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361600 pcs | On Request | 1 | On Request | On Request | On Request | On Request | On Request |
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| Industrial Grade | |
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The SN74ALVC125DGVR from Texas Instruments is a quadruple bus buffer gate featuring independent line drivers with 3-state outputs. Each output is disabled when its associated output-enable (OE) input is high. This device is designed for operation from 1.65V to 3.6V.
Key electrical characteristics include a maximum propagation delay of 2.8ns at 3.3V and an output drive capability of ±24mA at 3.3V. The gate exhibits latch-up performance exceeding 250mA per JESD 17 and ESD performance exceeding 2000V (Human-Body Model), 200V (Machine Model), and 1000V (Charged-Device Model).
This buffer gate is suitable for various digital logic applications requiring signal buffering and isolation. The 3-state output capability allows multiple devices to share a common bus line. The device is available in a 14-TVSOP package and is designed for surface mounting.
To ensure the high-impedance state during power-up or power-down, the OE input should be tied to VCC through a pullup resistor. The minimum value of this resistor is determined by the current-sinking capability of the driver.
| Qty | Low | High |
|---|---|---|
| 1+ | $1.20 | $1.20 |
Estimated market price range - modelled values for guidance only, not live distributor offers.
The supply voltage range is 1.65V to 3.6V.
At 3.3V, the typical output drive is ±24mA.
The maximum propagation delay is 2.8ns at 3.3V.
It exceeds 2000V Human-Body Model, 200V Machine Model, and 1000V Charged-Device Model.
The operating temperature range is -40°C to 85°C.
It is available in a 14-TVSOP surface mount package (14-TFSOP, 0.173" width, 4.40mm).
It exceeds 250mA per JESD 17.