| Distributor | Stock | Pricing | MOQ | PKG | Lead Time | Date Code | On Order Quantity | On Order Delivery | |
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200 pcs
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200 pcs | On Request | 1 | On Request | On Request | On Request | On Request | On Request |
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| SVHC Present |
The S32R458AASK0MUDT from NXP Semiconductors is a 32-bit automotive radar microprocessor unit (MPU) built on Arm Cortex-A53 and Arm Cortex-M7 cores. It is engineered for high-resolution, long-range front or rear radar sensors, enabling imaging radar capabilities.
Key features include Quad Arm Cortex-A53 cores running at 800 MHz and Triple Arm Cortex-M7 cores at 400 MHz, alongside specialized radar processing acceleration with SPT 3.1 at 600 MHz and a Linear Algebra Accelerator (LAX) capable of over 300 GFLOPS. It integrates 8 MB of SRAM with ECC and supports DDR3L-1600 and LP-DDR4 memory interfaces.
Designed for ADAS applications, it incorporates an HSE security engine and meets ISO26262 ASIL B(D) requirements. Connectivity options include 2x Gen 2/3 PCIe, 2x Gb Ethernet, and 8x FlexCAN with FD. The device operates within the Full Grade 1 temperature range and is part of the NXP Product Longevity program.
Packaged in an FBGA with 780 pins, the S32R458AASK0MUDT is suitable for demanding automotive, industrial, and consumer radar processing applications.
The S32R458AASK0MUDT features Quad Arm Cortex-A53 cores running at 800 MHz and Triple Arm Cortex-M7 cores running at 400 MHz.
It includes SPT 3.1 at 600 MHz with integrated DSP and multi-threading, and a Linear Algebra Accelerator (LAX) 1.0 providing over 300 GFLOPS.
The device has 8 MB of SRAM with ECC and supports DDR3L-1600 and LP-DDR4-1600/3200 memory interfaces.
It includes an in-field updatable Hardware Security Engine (HSE) with a comprehensive feature set.
The device is designed with safety in mind, meeting ISO26262 SEooC ASIL B(D) requirements.
It offers 2x Gen 2/3 PCIe, 2x Gb Ethernet (10/100/1000 Mbit/s), and 8x FlexCAN with FD.
The S32R458AASK0MUDT is packaged in an FBGA with 780 pins.