| Distributor | Stock | Pricing | MOQ | PKG | Lead Time | Date Code | On Order Quantity | On Order Delivery | |
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2,000 pcs
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2000 pcs | On Request | 1 | On Request | On Request | On Request | On Request | On Request |
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The S29GL256P90TFCR10 is a 256Mbit (32M x 8) Parallel NOR Flash memory device manufactured by Infineon Technologies. It utilizes a 90nm MirrorBit process technology and offers a parallel interface for high-speed read operations. The memory is organized as 32M x 8 bits and supports a page read buffer of 8 words/16 bytes and a write buffer of 32 words/64 bytes.
The device operates over a supply voltage range of 2.7V to 3.6V (full VCC) with a nominal 3.3V, and a VersatileIO (VIO) range of 1.65V to VCC. Access times are 90ns (regulated VCC) and 100ns (full VCC), with a page access time of 25ns. The write cycle time is 90ns. The memory is rated for operation from 0°C to 85°C ambient temperature.
The S29GL256P90TFCR10 is offered in a 56-TFSOP (0.724", 18.40mm Width) package, also known as a 56-TSOP, and is available in a 64-ball Fortified BGA package. Mounting is surface mount. The sector architecture is uniform 64 Kword/128 Kbyte with typical endurance of 100,000 erase cycles per sector and 20-year data retention. This device is suitable for code storage, data logging, and other embedded applications requiring reliable non-volatile memory.
| Qty | Low | High |
|---|---|---|
| 1+ | $1.28 | $1.28 |
Estimated market price range - modelled values for guidance only, not live distributor offers.
The operating voltage is 3.3V (nominal) with a range of 2.7V to 3.6V for full VCC operation. Additionally, the VersatileIO (VIO) can range from 1.65V to VCC.
The S29GL256P90TFCR10 is available in a 56-TFSOP (0.724", 18.40mm Width) and also in a 56-TSOP or 64-ball Fortified BGA package.
The operating temperature range is 0°C to 85°C (ambient).
256Mbit organized as 32M x 8.
The access time is 90ns (regulated VCC) or 100ns (full VCC).
Typical endurance is 100,000 erase cycles per sector, and data retention is typically 20 years.
Uniform 64 Kword/128 Kbyte sector architecture.